X-ray studies at the Department of Energy's SLAC National Accelerator Laboratory have for the first time observed an exotic property that could warp the electronic structure of a material in a way that reduces heat buildup and improves performance in ever-smaller computer components.

The research was conducted, in part, at SLAC's Stanford Synchrotron Radiation Lightsource (SSRL), a DOE Office of Science User Facility, and published this month in the print edition of Nature Materials.

Energy-bending Properties

The team studied a form of iridium oxide, Sr3Ir2O7, that belongs to a class of so-called correlated materials in which electrons can be made to behave in sync. It is a candidate for reducing the heat generated by the billions of transistors at the core of modern computers.

The researchers discovered that the material has a long-theorized property, formerly found only in 2-D materials and known as 3-D negative electronic compressibility, that is caused by its unusual electronic structure.

The electronic structure of a material is typically rigid, with distinct energy levels or "bands" that fill up as electrons are added. These levels are determined by the atomic structure and chemical composition of the material. In the study, these energy levels were observed to deform drastically, in a fluid way, as more electrons poured in, while the physical structure of the material did not change in any significant way.

"Imagine pouring water into a cup and watching the water level in the cup appear to dip as the cup deforms," said Junfeng He, a Boston College researcher who led the study. "That's how 3-D negative electronic compressibility appears to operate." But in this case, it is the material’s electronic structure – which defines how it can store or flow electric current – rather than its physical structure that substantially warps as electrons are added.

Guided by theoretical calculations led by Arun Bansil, a professor of physics at Northeastern University, researchers found that a gap between different groupings of energy bands in the sample material actually shrank as electrons were added, reducing the material's stored energy level – like the water level appearing to decline in the cup example.

In principle, using metal electrodes that have this property in the microscopic gates that regulate the flow of electrons in transistors could substantially enhance their efficiency and reduce heat buildup, said He, who will soon join SLAC as a postdoctoral researcher.

Building a Better Transistor

Rui-Hua He, an assistant professor of physics at Boston College who is a spokesperson for the research, said, "Replacing normal metals in transistors with materials like this that have negative electronic compressibility presents an intriguing alternative to current approaches, with a goal of continuing device miniaturization.” He added, "We are now working on the first demonstration of their potential application to transistors."

Researchers employed an advanced X-ray technique at SSRL, set up and maintained by SLAC staff scientists Donghui Lu and Makoto Hashimoto, to precisely measure the electronic structure of the material. The negative electronic compressibility they found shows promise for reducing power requirements needed to move electric current around a semiconductor, for example, which would reduce the heat it generates and make electrical switching more efficient.

Previous studies had observed a 2-D version of negative electronic compressibility in other materials, but researchers said the 3-D form has greater potential for application in semiconductors because it is more compatible with their present-day architecture, can potentially be used at room temperature and can be adapted for different applications by adjusting its thickness.

"This work informs us of the importance to continually look for other new materials with novel physical properties for use in transistors and for other applications," said Stephen Wilson, an assistant professor of materials at the University of California, Santa Barbara, who prepared the sample materials.

Participating researchers were from Boston College, Northeastern University, SLAC’s SSRL and Stanford Institute for Materials and Energy Sciences (SIMES), Lawrence Berkeley National Laboratory, Peking University in China, Hiroshima Synchrotron Radiation Center in Japan and the University of California, Santa Barbara. The work was supported by Boston College, the U.S. National Science Foundation, the W. M. Keck Foundation and the DOE Office of Basic Energy Sciences.

SLAC is a multi-program laboratory exploring frontier questions in photon science, astrophysics, particle physics and accelerator research. Located in Menlo Park, Calif., SLAC is operated by Stanford University for the U.S. Department of Energy's Office of Science. For more information, please visit slac.stanford.edu.

CAPTION University of Utah Electrical and Computer Engineering Associate Professor Rajesh Menon is leading a team that has created the world's smallest beamsplitter for silicon photonic chips. The discovery will lead to computers and mobile devices that could be millions of times faster than machines today because the information or data that is computed or shuttled is done through light instead of electrons. CREDIT Dan Hixson/University of Utah College of Engineering

Utah engineers take big step toward much faster supercomputers

University of Utah engineers have taken a step forward in creating the next generation of supercomputers and mobile devices capable of speeds millions of times faster than current machines.

The Utah engineers have developed an ultracompact beamsplitter -- the smallest on record -- for dividing light waves into two separate channels of information. The device brings researchers closer to producing silicon photonic chips that compute and shuttle data with light instead of electrons. Electrical and computer engineering associate professor Rajesh Menon and colleagues describe their invention today in the journal Nature Photonics.

Silicon photonics could significantly increase the power and speed of machines such as supercomputers, data center servers and the specialized computers that direct autonomous cars and drones with collision detection. Eventually, the technology could reach home computers and mobile devices and improve applications from gaming to video streaming.

"Light is the fastest thing you can use to transmit information," says Menon. "But that information has to be converted to electrons when it comes into your laptop. In that conversion, you're slowing things down. The vision is to do everything in light."

Photons of light carry information over the Internet through fiber-optic networks. But once a data stream reaches a home or office destination, the photons of light must be converted to electrons before a router or computer can handle the information. That bottleneck could be eliminated if the data stream remained as light within computer processors.

"With all light, computing can eventually be millions of times faster," says Menon.

To help do that, the U engineers created a much smaller form of a polarization beamsplitter (which looks somewhat like a barcode) on top of a silicon chip that can split guided incoming light into its two components. Before, such a beamsplitter was over 100 by 100 microns. Thanks to a new algorithm for designing the splitter, Menon's team has shrunk it to 2.4 by 2.4 microns, or one-fiftieth the width of a human hair and close to the limit of what is physically possible.

The beamsplitter would be just one of a multitude of passive devices placed on a silicon chip to direct light waves in different ways. By shrinking them down in size, researchers will be able to cram millions of these devices on a single chip.

Potential advantages go beyond processing speed. The Utah team's design would be cheap to produce because it uses existing fabrication techniques for creating silicon chips. And because photonic chips shuttle photons instead of electrons, mobile devices such as smartphones or tablets built with this technology would consume less power, have longer battery life and generate less heat than existing mobile devices.

The first supercomputers using silicon photonics -- already under development at companies such as Intel and IBM -- will use hybrid processors that remain partly electronic. Menon believes his beamsplitter could be used in those computers in about three years. Data centers that require faster connections between computers also could implement the technology soon, he says.

Rice University lab extends meniscus-mask process to make sub-10 nanometer paths

Water is the key component in a Rice University process to reliably create patterns of metallic and semiconducting wires less than 10 nanometers wide.

The technique by the Rice lab of chemist James Tour builds upon its discovery that the meniscus – the curvy surface of water at its edge – can be an effective mask to make nanowires.

The Rice team of Tour and graduate students Vera Abramova and Alexander Slesarev have now made nanowires between 6 and 16 nanometers wide from silicon, silicon dioxide, gold, chromium, tungsten, titanium, titanium dioxide and aluminum. They have also made crossbar structures of conducting nanowires from one or more of the materials.

A paper on their technique, called meniscus-mask lithography, has been published online by the American Chemical Society journal Nano Letters.

The process is promising for the semiconductor industry as it seeks to make circuits ever smaller. State-of-the-art integrated circuit fabrication allows for signal wires that approach 10 nanometers, visible only with powerful microscopes. These are the paths that connect the billions of transistors in modern electronic devices.

"This could have huge ramifications for chip production since the wires are easily made to sub-10-nanometer sizes," Tour said of the Rice process. "There's no other way in the world to do this en masse on a surface."

Current approaches to making such tiny wires take several paths. Lithography, the standard method for etching integrated circuits, is approaching the physical limits of its ability to shrink them further. Bulk synthesis of semiconducting and metallic nanowires is also possible, but the wires are difficult to position in integrated circuits.

Water's tendency to adhere to surfaces went from an annoyance to an advantage when the Rice researchers found they could use it as a mask to make patterns. The water molecules gather wherever a raised pattern joins the target material and forms a curved meniscus created by the surface tension of water.

The meniscus-mask process involves adding and then removing materials in a sequence that ultimately leaves a meniscus covering the wire and climbing the sidewall of a sacrificial metal mask that, when etched away, leaves the nanowire standing alone.

Tour said the process should work with modern fabrication technology with no modifications to existing equipment and minimal changes in fabrication protocols. No new tools or materials are needed.

Tour is the T.T. and W.F. Chao Chair in Chemistry as well as a professor of materials science and nanoengineering and of computer science and a member of Rice's Richard E. Smalley Institute for Nanoscale Science and Technology.

The Air Force Office of Scientific Research supported the research.

With a $1.3 million grant from the Air Force Research Laboratory, researchers at Rensselaer Polytechnic Institute will explore the design and potential of next-generation supercomputers that incorporate a highly efficient “neuromorphic” processor, which more closely represents the human brain in its architectural design.

In the Rensselaer project, titled “Massively Parallel Modeling and Simulation of Next-Generation Hybrid Neuromorphic Supercomputer Systems,” researchers will use the Institute’s supercomputer – one of the four most powerful university supercomputers in the U.S. – to simulate a hybrid supercomputer built with neuromorphic as well as classical supercomputing processors, testing various network designs and the resulting outcomes to applications.

“The question we’re asking is: What if future supercomputer designs were to have several embedded neuromorphic processors?” said Christopher Carothers, director of the Center for Computational Innovations. “How would you design that computer? And what new capabilities would it offer?”

The design will also incorporate a series of learning algorithms specific to the incorporation of the neuromorphic chip, said James Hendler, director of the Rensselaer Institute for Data Exploration and Applications (IDEA).

“Our goal is not just to explore the architecture of a potential next-generation machine,” said Hendler, an expert in artificial intelligence and cognitive computing, “but also to explore how such a machine can be used to tackle the hard science and engineering problems arising in our increasingly data-rich world.”

Neuromorphic computing is built on a computational model patterned on the human brain, incorporating an interconnected network of nodes or “neurons” that make it possible to encode information far more efficiently than classic computer chips. Computers that incorporate a neuromorphic approach excel at pattern recognition, with far less energy usage (and heat) than conventional chips, and have the potential to overcome looming barriers to increased computing speed. In particular, the researchers expect a neuromorphic processor could excel at identifying and responding to error messages and in processing sensor, image, and video data.

Although computer scientists have used algorithms to approximate neuromorphic computing (an approach commonly called  a “neural net”), IBM only recently built this first neuromorphic chip as part of a DARPA-funded research effort. The Rensselaer researchers will base their work on the specifications of IBM’s “True North” neuromorphic processor and simulation development kit. Neuromorophic processors are envisioned as the next leap in computational speed and efficiency. Initially, the computational processing unit (CPU) served as the sole processor used in supercomputing chips, but great gains were made with the introduction of energy-efficient, highly parallel graphics processing units (GPUs), and the use of multiple processors on each chip.  

The researchers will use AMOS, the Rensselaer supercomputer, to run a massively parallel simulation of proposed neuromorphic supercomputer designs in action. The simulation will allow them to explore both a single node (comprised of a CPU, GPU, and neuromorphic processor), as well as the network of the system, and the higher level architecture of the design.

“So, we’re actually using a supercomputer to simulate another supercomputer that doesn’t even exist,” said Carothers. “It’s a great use of supercomputing technology because we can take advantage of its power to run accurate simulations at a finer, more granular level than can be built.” 

Surface plasmons are propagating electronic oscillations localized to metal-insulator (e.g. gold-air) interfaces. Gap plasmons (GPs) arise when two such interfaces are separated by a narrow gap across the insulator layer, transversely confining the electromagnetic energy in an MIM (metal-insulator-metal) waveguide. In this illustration, a free-space excitation laser (vertical light on the right) couples to GPs (alternating red/blue light) in a gold/air/gold nanofabricated waveguide. A grating is used to match the laser light momentum with to a GP. The GP propagates through the waveguide under free-floating micro-beams in the top gold layer (color coded to show depth). When the beams are electrically actuated towards the bottom gold layer, the effective refractive index of the waveguide increases under the beams, phase-retarding the GP. CREDIT Brian Dennis, Rutgers University

A team that includes Rutgers University and National Institute of Standards and Technology scientists believes that a technology it is reporting this week in Nature Photonics could result in optical switches with sub-square-micron footprints, potentially allowing densely packed switching fabrics on a chip.

These dimensions contrast with established optical switching technologies based on other technologies, such as MEMS, lithium niobate, and silicon and electro-optic polymer plasmonic technologies, that have active elements in scales up to hundreds of microns.

The scientists have shown that an optical signal can be modulated in a 200 nanometer-high waveguide. The signal's phase is modulated as it passes through an air gap between two gold layers, when a force generated by the device slightly deforms the top gold layer.

The scientists propose that when one of these modulators is placed next to a similar static device, it could act as a 2x2 switch, based on evidence reported elsewhere of coupling between adjacent waveguides. The technology could also be useful for electrically tunable plasmonic devices.

Their paper describes "compact nanomechanical plasmonic phase modulators." The scientists experimentally verified such devices in a 23 micron-long waveguide with a gap in the range of 200 nm, but they make a case based on supcomputer modeling that the waveguides can be scaled to as little as 1 micron long with a 20 nm gap, without significant loss. This means optical switches could be scaled closer to electronic device dimensions.

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